Digital Electronics-Memory and Storage

Digital Electronics-Memory and Storage
1. How many address bits are needed to select all memory locations in the 2118 16K × 1 RAM?
  • 8
  • 10
  • 14
  • 16
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2. The check sum method of testing a ROM:
  • indicates if the data in more than one memory location is incorrect.
  • provides a means for locating and correcting data errors in specific memory locations.
  • allows data errors to be pinpointed to a specific memory location.
  • simply indicates that the contents of the ROM are incorrect.
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3. What is the meaning of RAM, and what is its primary role?
  • Readily Available Memory; it is the first level of memory used by the computer in all of its operations.
  • Random Access Memory; it is memory that can be reached by any sub- system within a computer, and at any time.
  • Random Access Memory; it is the memory used for short-term temporary data storage within the computer.
  • Resettable Automatic Memory; it is memory that can be used and then automatically reset, or cleared, after being read from or written to.
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4. The storage element for a static RAM is the ________.
  • diode
  • resistor
  • capacitor
  • flip-flop
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5. In a DRAM, what is the state of R/W during a read operation?
  • Low
  • High
  • Hi-Z
  • None of the above
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6. The condition occurring when two or more devices try to write data to a bus simultaneously is called ________.
  • address decoding
  • bus contention
  • bus collisions
  • address multiplexing
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7. Which is/are the basic refresh mode(s) for dynamic RAM?
  • Burst refresh
  • Distributed refresh
  • Open refresh
  • Burst refresh and distributed refresh
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8. One of the most important specifications on magnetic media is the ________.
  • rotation speed
  • tracks per inch
  • data transfer rate
  • polarity reversal rate
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9. A 64-bit word consists of ________.
  • 4 bytes
  • 8 bytes
  • 10 bytes
  • 12 bytes
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10. The reason the data outputs of most ROM ICs are tristate outputs is to:
  • allow for three separate data input lines.
  • allow the bidirectional flow of data between the bus lines and the ROM registers.
  • permit the connection of many ROM chips to a common data bus.
  • isolate the registers from the data bus during read operations.
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