Integrated-Circuit Logic Families Questions and Answers

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Q11
What must be done to interface CMOS to TTL?
  • A A dropping resistor must be used on the CMOS 12 V supply to reduce it to 5 V for the TTL.
  • B As long as the CMOS supply voltage is 5 V, they can be interfaced; however, the fan-out of the CMOS is limited to two TTL gates.
  • C A 5 V Zener diode must be placed across the inputs of the TTL gates in order to protect them from the higher output voltages of the CMOS gates.
  • D The two series cannot be interfaced without the use of special interface buffers designed for that purpose, such as the open-collector buffers.
Answer: Option B
Q12
What is the static charge that can be stored by your body as you walk across a carpet?
  • A 300 volts
  • B 3,000 volts
  • C 30,000 volts
  • D Over 30,000 volts
Answer: Option D
Q13
Which of the following logic families has the highest noise margin?
  • A TTL
  • B LS TTL
  • C CMOS
  • D HCMOS
Answer: Option D
Q14
A "floating" TTL input may be defined as:
  • A unused input that is tied to Vcc through a 1 k resistor.
  • B unused input that is tied to used inputs.
  • C unused input that is tied to the ground.
  • D unused input that is not connected.
Answer: Option D
Q15
Which of the logic families listed below allows the highest operating frequency?
  • A 74AS
  • B ECL
  • C HCMOS
  • D 54S
Answer: Option B
Q16
Whenever a totem-pole TTL output goes from LOW to HIGH, a high-amplitude current spike is drawn from the Vcc supply. How is this effect corrected to a digital circuit?
  • A By connecting a radio-frequency capacitor from Vcc to ground.
  • B By using a switching power supply
  • C By connecting a capacitor from Vout to ground
  • D By connecting a large resistor from Vcc to Vout
Answer: Option A
Q17
What is the increase in switching speed between 74LS series TTL and 74HC/HCT (High-Speed CMOS)?
  • A 5
  • B 10
  • C 50
  • D 100
Answer: Option B
Q18
A logic signal experiences a delay in going through a circuit. The two propagation delay times are defined as:
  • A tPLH and tPHL.
  • B tDLH and tDHL.
  • C tHPL and tlph.
  • D tLDH and tHDL.
Answer: Option A
Q19
What does ECL stand for?
  • A It stands for electron-coupled logic; all of the devices used within the gates are N-type transistors.
  • B It stands for emitter-coupled logic; all of the inputs are coupled into the device through the emitters of the input transistors.
  • C It stands for emitter-coupled logic; all of the emitters of the input transistors are connected together and each transistor functions as an emitter follower.
  • D It stands for energy-coupled logic; the input energy is amplified by the input transistors and allows the device to deliver higher output currents.
Answer: Option C
Q20
What is unique about TTL devices such as the 74S00?
  • A The gate transistors are silicon (S), and the gates therefore have lower values of leakage current.
  • B The S denotes the fact that a single gate is present in the IC rather than the usual package of 2–6 gates.
  • C The S denotes a slow version of the device, which is a consequence of its higher power rating.
  • D The devices use Schottky transistors and diodes to prevent them from going into saturation; this results in faster turn on and turn off times, which translates into higher frequency operation.
Answer: Option D

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