Standard Logic Devices (SLD) Questions and Answers

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Showing 10 of 25 questions
Q11
Low power consumption achieved by CMOS circuits is due to which construction characteristic?
  • A complementary pairs
  • B connecting pads
  • C DIP packages
  • D small-scale integration
Answer: Option A
Q12
TTL totem pole circuit is designed so that the output transistors are:
  • A always on together
  • B providing phase splitting
  • C providing voltage regulation
  • D never on together
Answer: Option D
Q13
The time needed for an output to change as the result of an input change is known as:
  • A noise immunity
  • B fanout
  • C propagation delay
  • D rise time
Answer: Option C
Q14
ECL gates are noted for their high frequency capability and small output voltage swing.
  • A TRUE
  • B FALSE
Answer: Option A
Q15
Delay times and current/voltage values remain constant regardless of temperature or other operating conditions for robust circuits like TTL.
  • A TRUE
  • B FALSE
Answer: Option B
Q16
5400 TTL series logic chips are made to military specifications.
  • A TRUE
  • B FALSE
Answer: Option A
Q17
Totem pole output circuits can change states faster than open-collector output circuits.
  • A TRUE
  • B FALSE
Answer: Option A
Q18
The term buffer/driver signifies the ability to provide low output currents to drive light loads.
  • A TRUE
  • B FALSE
Answer: Option B
Q19
NMOS devices use MOSFETs to implement the full range of logic gates using the universal NAND gate.
  • A TRUE
  • B FALSE
Answer: Option B
Q20
Schottky TTL logic gates overcome the problem of saturation delay time.
  • A TRUE
  • B FALSE
Answer: Option A

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