Shift Registers Questions and Answers
Practice ModeShowing 10 of 69 questions
Q1
On the fifth clock pulse, a 4-bit Johnson sequence is Q0 = 0, Q1 = 1, Q2 = 1, and Q3 = 1. On the sixth clock pulse, the sequence is ________.
Answer: Option C
Q2
The bit sequence 0010 is serially entered (right-most bit first) into a 4-bit parallel out shift register that is initially clear. What are the Q outputs after two clock pulses?
Answer: Option C
Q3
What is a shift register that will accept a parallel input, or a bidirectional serial load and internal shift features, called?
Answer: Option C
Q4
On the third clock pulse, a 4-bit Johnson sequence is Q0 = 1, Q1 = 1, Q2 = 1, and Q3 = 0. On the fourth clock pulse, the sequence is ________.
Answer: Option A
Q5
A bidirectional 4-bit shift register is storing the nibble 1101. Its input is HIGH. The nibble 1011 is waiting to be entered on the serial data-input line. After three clock pulses, the shift register is storing ________.
Answer: Option B
Q6
How can parallel data be taken out of a shift register simultaneously?
Answer: Option D
Q7
What is meant by parallel load of a shift register?
Answer: Option A
Q8
What does the output enable do on the 74395A chip?
Answer: Option D
Q9
To operate correctly, starting a ring shift counter requires:
Answer: Option B
Q10
In a 6-bit Johnson counter sequence there are a total of how many states, or bit patterns?
Answer: Option C