Shift Registers Questions and Answers
Practice ModeShowing 10 of 69 questions
Q11
A modulus-12 ring counter requires a minimum of ________.
Answer: Option B
Q12
Stepper motors have become popular in digital automation systems because ________.
Answer: Option D
Q13
The group of bits 11001 is serially shifted (right-most bit first) into a 5-bit parallel output shift register with an initial state 01110. After three clock pulses, the register contains ________.
Answer: Option C
Q14
Assume that a 4-bit serial in/serial out shift register is initially clear. We wish to store the nibble 1100. What will be the 4-bit pattern after the second clock pulse? (Right-most bit first.)
Answer: Option C
Q15
A serial in/parallel out, 4-bit shift register initially contains all 1s. The data nibble 0111 is waiting to enter. After four clock pulses, the register contains ________.
Answer: Option C
Q16
With a 200 kHz clock frequency, eight bits can be serially entered into a shift register in ________.
Answer: Option B
Q17
An 8-bit serial in/serial out shift register is used with a clock frequency of 2 MHz to achieve a time delay (td) of ________.
Answer: Option C
Q18
A sequence of equally spaced timing pulses may be easily generated by which type of counter circuit?
Answer: Option A
Q19
The bit sequence 10011100 is serially entered (right-most bit first) into an 8-bit parallel out shift register that is initially clear. What are the Q outputs after four clock pulses?
Answer: Option B
Q20
If an 8-bit ring counter has an initial state 10111110, what is the state after the fourth clock pulse?
Answer: Option D