Shift Registers Questions and Answers

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Q51
When the output of a tristate shift register is disabled, the output level is placed in a:
  • A float state
  • B LOW state
  • C high-impedance state
  • D float or high-impedance state
Answer: Option D
Q52
One of the stages in a register consists of a latch.
  • A TRUE
  • B FALSE
Answer: Option A
Q53
There are several ways to construct a stepper motor to achieve digitally controlled stepping action. One possibility is to construct four stator coils set up as four pole pairs, each 45° apart and using three ferromagnetic pairs spaced 60° apart.
  • A TRUE
  • B FALSE
Answer: Option A
Q54
A parallel load operation is asynchronous, so it is not dependent on the clock.
  • A TRUE
  • B FALSE
Answer: Option A
Q55
A ferromagnetic material is one that forms a resistance to magnetic fields.
  • A TRUE
  • B FALSE
Answer: Option B
Q56
A counter has a specified sequence of states, but a shift register does not.
  • A TRUE
  • B FALSE
Answer: Option A
Q57
In a 74164 8-bit shift register, in order for the parallel data output to be synchronously loaded on the negative clock edge, the parallel enable input is LOW.
  • A TRUE
  • B FALSE
Answer: Option B
Q58
Practically every possible load, shift, and conversion operation is available in a shift register IC.
  • A TRUE
  • B FALSE
Answer: Option A
Q59
Using separate serial inputs for shifting left or shifting right is a major difference between the 74194 and other shift registers.
  • A TRUE
  • B FALSE
Answer: Option A
Q60
Parallel load means to load all flip-flops at the same time.
  • A TRUE
  • B FALSE
Answer: Option A

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