Digital Arithmetic Operations and Circuits Questions and Answers

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Showing 10 of 92 questions
Q71
A sign bit of "1" in the difference of a 2's-complement subtraction problem indicates the magnitude is negative and in true binary form.
  • A TRUE
  • B FALSE
Answer: Option B
Q72
Constants must be included in a package.
  • A TRUE
  • B FALSE
Answer: Option A
Q73
10011100 in two's-complement notation has a decimal value of –100.
  • A TRUE
  • B FALSE
Answer: Option B
Q74
There are four possible combinations for subtracting two binary numbers.
  • A TRUE
  • B FALSE
Answer: Option A
Q75
It is not necessary to have the same number of bits when adding or subtracting signed binary numbers in the 2's-complement system.
  • A TRUE
  • B FALSE
Answer: Option B
Q76
Full adder results are typically stored in registers.
  • A TRUE
  • B FALSE
Answer: Option A
Q77
The representation of –110 in eight-bit two's-complement notation is 11110111.
  • A TRUE
  • B FALSE
Answer: Option B
Q78
When the 2's-complement system is used, the number to be subtracted is changed to its 2's complement and then added to the minuend.
  • A TRUE
  • B FALSE
Answer: Option A
Q79
Full adders can add two numbers and need not have a carry input or a carry output.
  • A TRUE
  • B FALSE
Answer: Option B
Q80
The VHDL compiler requires libraries to be specified at the beginning of the code if components from those libraries are being used.
  • A TRUE
  • B FALSE
Answer: Option A

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