Digital Electronics-Combinational Logic Circuits
Digital Electronics-Combinational Logic Circuits
11. Which of the following expressions is in the product-of-sums form?
- (A + B)(C + D)
- (AB)(CD)
- AB(CD)
- AB + CD
12. Which of the following is an important feature of the sum-of-products form of expressions?
- All logic circuits are reduced to nothing more than simple AND and OR operations.
- The delay times are greatly reduced over other forms.
- No signal must pass through more than two gates, not including inverters.
- The maximum number of gates that any signal must pass through is reduced by a factor of two.
13. An output gate is connected to four input gates; the circuit does not function. Preliminary tests with the DMM indicate that the power is applied; scope tests show that the primary input gate has a pulsing signal, while the interconnecting node has no signal. The four load gates are all on different ICs. Which instrument will best help isolate the problem?
- Current tracer
- Logic probe
- Oscilloscope
- Logic analyzer
14. The binary numbers A = 1100 and B = 1001 are applied to the inputs of a comparator. What are the output levels?
- A > B = 1, A < B = 0, A < B = 1
- A > B = 0, A < B = 1, A = B = 0
- A > B = 1, A < B = 0, A = B = 0
- A > B = 0, A < B = 1, A = B = 1
15. A logic probe is placed on the output of a gate and the display indicator is dim. A pulser is used on each of the input terminals, but the output indication does not change. What is wrong?
- The output of the gate appears to be open.
- The dim indication on the logic probe indicates that the supply voltage is probably low.
- The dim indication is a result of a bad ground connection on the logic probe.
- The gate may be a tristate device.
16. Each "1" entry in a K-map square represents:
- a HIGH for each input truth table condition that produces a HIGH output.
- a HIGH output on the truth table for all LOW input combinations.
- a LOW output for all possible HIGH input conditions.
- a DON'T CARE condition for all possible input truth table combinations.
17. Looping on a K-map always results in the elimination of:
- variables within the loop that appear only in their complemented form.
- variables that remain unchanged within the loop.
- variables within the loop that appear in both complemented and uncomplemented form.
- variables within the loop that appear only in their uncomplemented form.
18. What will a design engineer do after he/she is satisfied that the design will work?
- Put it in a flow chart
- Program a chip and test it
- Give the design to a technician to verify the design
- Perform a vector test
19. What is the indication of a short on the input of a load gate?
- Only the output of the defective gate is affected.
- There is a signal loss to all gates on the node.
- The affected node will be stuck in the LOW state.
- There is a signal loss to all gates on the node, and the affected node will be stuck in the LOW state.
20. In HDL, LITERALS is/are:
- digital systems.
- scalars.
- binary coded decimals.
- a numbering system.