Digital Electronics-Integrated Circuit Technologies

Digital Electronics-Integrated Circuit Technologies
21. Which factor does not affect CMOS loading?
  • Charging time associated with the output resistance of the driving gate
  • Discharging time associated with the output resistance of the driving gate
  • Output capacitance of the load gates
  • Input capacitance of the load gates
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22. Which is not part of emitter-coupled logic (ECL)?
  • Differential amplifier
  • Bias circuit
  • Emitter-follower circuit
  • Totem-pole circuit
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23. The speed-power product provides a basis for the comparison of logic circuits when power dissipation and propagation delay are important considerations in the selection of the type of logic to be used.
  • TRUE
  • FALSE
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24. ECL IC technology is faster than TTL technology.
  • TRUE
  • FALSE
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25. CMOS is a more dominant IC technology than TTL.
  • TRUE
  • FALSE
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26. Unused TTL inputs should be tied LOW.
  • TRUE
  • FALSE
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27. The greater the propagation delay, the higher the maximum frequency.
  • TRUE
  • FALSE
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28. A pull-down resistor must be used with open-collector TTL circuits.
  • TRUE
  • FALSE
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29. Metal-oxide semiconductor field-effect transistors (MOSFETs) are the active switching elements in CMOS circuits.
  • TRUE
  • FALSE
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30. There are four different logic level ranges for TTL and CMOS: VIL, VIH, VOL, and VOH.
  • TRUE
  • FALSE
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Digital Electronics
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