Digital Electronics-Integrated-CircuitLogic Families

Digital Electronics-Integrated-CircuitLogic Families
21. Generally, the voltage measured at an unused TTL input would typically be measured between:
  • 1.4 to 1.8 V.
  • 0 to 5 V.
  • 0 to 1.8 V.
  • 0.8 to 5 V.
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22. The IEEE/ANSI notation of an internal underlined diamond denotes:
  • totem-pole outputs.
  • open-collector outputs.
  • quadrature amplifiers.
  • tristate buffers.
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23. The bipolar TTL logic family that was developed to increase switching speed by preventing transistor saturation is:
  • emitter-coupled logic (ECL).
  • current-mode logic (CML).
  • transistor-transistor logic (TTL).
  • emitter-coupled logic (ECL) and transistor-transistor logic (TTL).
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24. The major advantage of TTL logic circuits over CMOS is lower propagation delay.
  • TRUE
  • FALSE
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25. The data sheet for the 74 series of TTL ICs shows that Vcc has a range of 4.5 V to 5.5 V.
  • TRUE
  • FALSE
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26. The major advantage of CMOS logic circuits over TTL is very low power consumption.
  • TRUE
  • FALSE
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27. The dc noise margins calculated using the proper values from a standard TTL data sheet are the worst-case margins. The typical dc noise margins are usually somewhat higher.
  • TRUE
  • FALSE
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28. The principal advantage of MOS ICs over TTL ICs is their fast operating speed.
  • TRUE
  • FALSE
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29. The CMOS series that is pin-compatible with the TTL family is the 4000 series.
  • TRUE
  • FALSE
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30. The TTL HIGH level source current is higher than the LOW level sinking current.
  • TRUE
  • FALSE
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