Digital Electronics-Memory and Storage
Digital Electronics-Memory and Storage
51. How many 1K × 4 RAM chips would be required to build a 1K × 8 memory system?
- 2
- 4
- 8
- 16
53. Which of the following faults will the checkerboard pattern test for in RAM?
- Short between adjacent cells
- Ability to store both 0s and 1s
- Dynamically introduced errors between cells
- All of the above
55. The location of a unit of data in a memory array is called its ________.
- storage
- RAM
- address
- data
57. Why is a refresh cycle necessary for a dynamic RAM?
- to clear the flip-flops
- to set the flip-flops
- The refresh cycle discharges the capacitor cells.
- The refresh cycle keeps the charge on the capacitor cells.
58. Which is not a magnetic storage device?
- Magnetic disk
- Magnetic tape
- Magneto-optical disk
- Optical disk
59. The time from the beginning of a read cycle to the end of tACS or tAA is referred to as:
- access time
- data hold
- read cycle time
- write enable time