Electronics-Flip-Flops and Timers
Electronics-Flip-Flops and Timers
1. Which of the following is correct for a gated D-type flip-flop?
- The Q output is either SET or RESET as soon as the D input goes HIGH or LOW.
- The output complement follows the input when enabled.
- Only one of the inputs can be HIGH at a time.
- The output toggles if one of the inputs is held HIGH.
2. When both inputs of a J-K flip-flop cycle, the output will:
- be invalid
- not change
- change
- toggle
3. Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
- asynchronous operation
- low input voltages
- gate impedance
- cross coupling
4. A basic S-R flip-flop can be constructed by cross-coupling which basic logic gates?
- AND or OR gates
- XOR or XNOR gates
- NOR or NAND gates
- AND or NOR gates
5. One example of the use of an S-R flip-flop is as a(n):
- transition pulse generator
- astable oscillator
- racer
- switch debouncer
6. If both inputs of an S-R NAND latch are LOW, what will happen to the output?
- The output would become unpredictable.
- The output will toggle.
- The output will reset.
- No change will occur in the output.
7. An astable multivibrator is a circuit that:
- has two stable states
- is free-running
- produces a continuous output signal
- is free-running and produces a continuous output signal
10. What is the significance of the J and K terminals on the J-K flip-flop?
- There is no known significance in their designations.
- The J represents "jump," which is how the Q output reacts whenever the clock goes HIGH and the J input is also HIGH.
- The letters represent the initials of Johnson and King, the co-inventors of the J-K flip-flop.
- All of the other letters of the alphabet are already in use.