Flip-Flops and Timers Questions and Answers
Practice ModeShowing 10 of 20 questions
Q1
Which of the following is correct for a gated D-type flip-flop?
Answer: Option A
Q2
When both inputs of a J-K flip-flop cycle, the output will:
Answer: Option B
Q3
Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
Answer: Option D
Q4
A basic S-R flip-flop can be constructed by cross-coupling which basic logic gates?
Answer: Option C
Q5
One example of the use of an S-R flip-flop is as a(n):
Answer: Option D
Q6
If both inputs of an S-R NAND latch are LOW, what will happen to the output?
Answer: Option A
Q7
An astable multivibrator is a circuit that:
Answer: Option C
Q8
What is another name for a one-shot?
Answer: Option A
Q9
The truth table for an S-R flip-flop has how many VALID entries?
Answer: Option A
Q10
What is the significance of the J and K terminals on the J-K flip-flop?
Answer: Option A