Digital Electronics-Digital Arithmetic Operations and Circuits
Digital Electronics-Digital Arithmetic Operations and Circuits
31. Convert each of the signed decimal numbers to an 8-bit signed binary number (two's-complement).
+7 –3 –12
+7 –3 –12
- 0000 0111 1111 1101 1111 0100
- 1000 0111 0111 1101 0111 0100
- 0000 0111 0000 0011 0000 1100
- 0000 0111 1000 0011 1000 1100
32. What is one disadvantage of the ripple-carry adder?
- The interconnections are more complex.
- More stages are required to a full adder.
- It is slow due to propagation time.
- All of the above.
34. Convert the decimal numbers 275 and 965 to binary-coded decimal (BCD) and add. Select the BCD code groups that reflect the final answer.
- 1101 1110 1010
- 1110 1010 1110
- 0001 0010 0100 0000
- 0010 0011 0100 0000
35. When multiplying 13 × 11 in binary, what is the third partial product?
- 1011
- 00000000
- 100000
- 100001
37. The selector inputs to an arithmetic/logic unit (ALU) determine the:
- selection of the IC
- arithmetic or logic function
- data word selection
- clock frequency to be used
38. An 8-bit register may provide storage for two's-complement codes within which decimal range?
- +128 to –128
- –128 to +127
- +128 to –127
- +127 to –127
39. A full-adder adds ________.
- two single bits and one carry bit
- two 2-bit binary numbers
- two 4-bit binary numbers
- two 2-bit numbers and one carry bit
40. The carry propagation delay in 4-bit full-adder circuits:
- is cumulative for each stage and limits the speed at which arithmetic operations are performed
- is normally not a consideration because the delays are usually in the nanosecond range
- decreases in direct ratio to the total number of full-adder stages
- increases in direct ratio to the total number of full-adder stages, but is not a factor in limiting the speed of arithmetic operations