Electronics-Standard Logic Devices (SLD)

Electronics-Standard Logic Devices (SLD)
11. Low power consumption achieved by CMOS circuits is due to which construction characteristic?
  • complementary pairs
  • connecting pads
  • DIP packages
  • small-scale integration
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12. TTL totem pole circuit is designed so that the output transistors are:
  • always on together
  • providing phase splitting
  • providing voltage regulation
  • never on together
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13. The time needed for an output to change as the result of an input change is known as:
  • noise immunity
  • fanout
  • propagation delay
  • rise time
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14. ECL gates are noted for their high frequency capability and small output voltage swing.
  • TRUE
  • FALSE
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15. Delay times and current/voltage values remain constant regardless of temperature or other operating conditions for robust circuits like TTL.
  • TRUE
  • FALSE
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16. 5400 TTL series logic chips are made to military specifications.
  • TRUE
  • FALSE
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17. Totem pole output circuits can change states faster than open-collector output circuits.
  • TRUE
  • FALSE
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18. The term buffer/driver signifies the ability to provide low output currents to drive light loads.
  • TRUE
  • FALSE
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19. NMOS devices use MOSFETs to implement the full range of logic gates using the universal NAND gate.
  • TRUE
  • FALSE
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20. Schottky TTL logic gates overcome the problem of saturation delay time.
  • TRUE
  • FALSE
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